Solving Quantified First Order Formulas in Satisfiability Modulo Theories

Design errors in computer systems, i.e. bugs, can cause inconvenience, loss of data and time, and in some cases catastrophic damages. One approach for improving design correctness is formal methods: techniques aiming at mathematically establishing that a piece of hardware or software satisfies certain properties. For some industrial cases in which formal methods are utilized, a huge number of extremely large mathematical formulas are generated and checked for satisfiability. For these applications, high-performance solvers, which automatically check the formulas, play a crucial role. For example, propositional logic (SAT) solvers are very popular. However, it is rather expensive to encode certain problems in propositional logic and the encoding is tricky and hard to understand. Recently, Satisfiability Modulo Theories (SMT) solvers have been developed to handle formulas in a more expressive first order logic. In contrast to general theorem provers that check satisfiability under all models, SMT solvers check satisfiability with regard to some background theories, such as theories of arithmetic, arrays and bit-vectors. SMT solvers are efficient and automatic like SAT solvers, while accepting much more general formulas. For some applications, SMT formulas with quantifiers are useful. Tradi-